Ernel and file locks. The processors with no SSDs retain web page caches
Ernel and file locks. The processors without the need of SSDs maintain page caches to serve applications IO requests. IO requests from applications are routed towards the caching nodes by way of message passing to cut down remote memory access. The caching nodes maintain message passing queues plus a pool of threads for processing messages. On completion of an IO request, the data is written back for the destination memory straight then a reply is sent to the issuing thread. This design opens opportunities to move application computation for the cache to lessen remote memory access.NIHPA Author Manuscript NIHPA Author Manuscript NIHPA Author ManuscriptICS. Author manuscript; offered in PMC 204 January 06.Zheng et al.PageWe separate IO nodes from caching nodes in an effort to balance computation. IO operations demand substantial CPU and running a cache on an IO node overloads the processor and reduces IOPS. This really is a design choice, not a requirement, i.e. we can run a setassociative cache around the IO nodes too. Within a NUMA machine, a sizable fraction of IOs require remote memory transfers. This occurs when application threads run on other nodes than IO nodes. Separating the cache and IO nodes does increase remote memory transfers. Having said that, balanced CPU utilization tends to make up for this impact in functionality. As systems scale to additional processors, we anticipate that handful of processors will have PCI buses, that will enhance the CPU load on these nodes, to ensure that splitting these functions will continue to be advantageous. Message passing creates quite a few small requests and synchronizing these requests can grow to be high-priced. Message passing might block sending threads if their queue is complete and receiving threads if their queue is empty. Synchronization of requests usually includes cache PubMed ID:https://www.ncbi.nlm.nih.gov/pubmed/26991688 line invalidation on shared information and JW74 site thread rescheduling. Frequent thread rescheduling wastes CPU cycles, stopping application threads from receiving adequate CPU. We cut down synchronization overheads by amortizing them over bigger messages.NIHPA Author Manuscript NIHPA Author Manuscript NIHPA Author Manuscript5. EvaluationWe conduct experiments on a nonuniform memory architecture machine with four Intel Xeon E54620 processors, clocked at 2.2GHz, and 52GB memory of DDR3333. Each processor has eight cores with hyperthreading enabled, resulting in 6 logical cores. Only two processors within the machine have PCI buses connected to them. The machine has 3 LSI SAS 9278i host bus adapters (HBA) connected to a SuperMicro storage chassis, in which 6 OCZ Vertex 4 SSDs are installed. Along with the LSI HBAs, there’s 1 RAID controller that connects to disks with root filesystem. The machine runs Ubuntu Linux 2.04 and Linux kernel v3.2.30. To examine the best overall performance of our method design with that with the Linux, we measure the technique in two configurations: an SMP architecture applying a single processor and NUMA applying all processors. On all IO measures, Linux performs best from a single processor. Remote memory operations make working with all 4 processors slower. SMP configuration: six SSDs connect to 1 processor by means of two LSI HBAs controlling eight SSDs each and every. All threads run around the similar processor. Information are striped across SSDs. NUMA configuration: six SSDs are connected to two processors. Processor 0 has five SSDs attached to an LSI HBA and a single via the RAID controller. Processor has two LSI HBAs with five SSDs every single. Application threads are evenly distributed across all 4 processors. Data are distributed.
